A distributed and topology-agnostic approach for on-line NoC testing

Kakoee, M.R. and Bertacco, V. and Benini, L.
Networks on Chip (NoCS), 2011 Fifth IEEE/ACM International Symposium on.
A new distributed on-line test mechanism for NoCs is proposed which scales to large-scale networks with general topologies and routing algorithms. Each router and its links are tested using neighbors in different phases. Only the router under test is in test mode and all other parts of the NoC are in functional mode. Experimental results show that our on-line test approach can detect stuck-at and short-wire faults in the routers and links. Our approach achieves 100% fault coverage for the data-path and 85% for the control paths including routing logic, FIFO’s control path and the arbiter of a 5×5 router. Synthesis results show that the hardware overhead of our test components with TMR (Triple Module Redundancy) support is 20% for covering both stuck-at and short-wire faults and 7% for covering only stuck-at faults in the 5×5
router. Simulation results show that our on-line testing approach has an average latency overhead of 20% and 3% in synthetic traffic and PARSEC traffic benchmarks on an 8×8 NoC, respectively.
DOI: 10.1145/1999946.1999965