Quantifying the Impact of Frequency Scaling on the Energy Eciency of the Single-Chip Cloud Computer
A. Bartolini, M. Sadri, J. Furst, A.K. Coskun, and L. Benini.
Design, Automation Test in Europe Conference Exhibition (DATE), 2012, pages 181-186, March 2012
Dynamic frequency and voltage scaling (DVFS) techniques have been widely used for meeting energy constraints. Single-chip many-core systems bring new challenges owing to the large number of operating points and the shift to message passing interface (MPI) from shared memory communication. DVFS, however, has been mostly studied on single-chip systems with one or few cores, without considering the impact of the communication among cores. This paper evaluates the impact of frequency scaling on the performance and power of many-core systems with MPI. We conduct experiments on the Single-Chip Cloud Computer (SCC), an experimental many-core processor developed by Intel. The paper first introduces the run-time monitoring infrastructure and the application suite we have designed for an in-depth evaluation of the SCC. We provide an extensive analysis quantifying the eff ects of frequency perturbations on performance and energy efficiency. Experimental results show that run-time communication patterns lead to signifi cant diff erences in power/performance tradeoff s in many-core systems with MPI.
